According to a report in Bloomberg last Thursday, SiFive, the developer of RISC-V based processor core intellectual property (IP), has been in talks with potential advisers on how to handle takeover interest, as it has had offers from multiple parties (not just Intel). SiFive is also pondering whether to entertain these bidders or to remain independent for longer and look at further investment, which the company deems preferable at this stage.
SiFive raised $61 million last August to take its total funding to $190 million, with its investors including Intel Capital, Qualcomm Ventures, SK Hynix and Western Digital. Following its last fundraise, it appointed ex-Qualcomm executive Patrick Little as its new president and CEO to succeed Naveed Sherwani.
In an interview with EE Times on his appointment, Little said he joined because he saw that RISC-V was at a point of inflection, and he saw opportunity. He said that the RISC-V instruction set architecture (ISA) could potentially unlock parts of the embedded applications market that are diverse and fragmented.
Little pointed to the complementarity of different processor architectures, especially with Arm, but also noted what he said at the time was industry sentiment towards the Nvidia/Arm deal. “There are many times you do need Arm’s ecosystem, but where customers want targeted differentiation, that’s where we add value. On many occasions we sit side-by-side with Arm in a system on chip (SoC). We’ve been in a lot of designs together and that will continue.” In contrast, he added, “Clearly Arm’s success stems from its neutrality, but with RISC-V being an open ISA, there is no threat of lockout. Most companies had been contemplating moving to an open ISA as part of an operational strategy. But now, companies are seriously looking at the move to an open ISA as a strategic imperative.”
While acquisition of SiFive might appear to be a move by Intel to shore up its position alongside Arm, there is a certain traction at SiFive to make it a more attractive purchase for potential bidders. The RISC-V core IP supplier has signed up partnerships recently with Renesas, Dialog Semiconductor, Samsung Foundry and the new Intel foundry services business, as well as taping out in 5nm TSMC silicon. Renesas is licensing SiFive’s core IP portfolio to jointly develop high-end RISC-V solutions for automotive applications.
The rise of RISC-V?
As SiFive’s Little and others have indicated, interest and opportunity for RISC-V has grown somewhat since the Arm/Nvidia deal, but not just because of this. The US restrictions on China have also pushed RISC-V up the agenda in China, one of the hotbeds of promising startups in the EE Times Silicon 100, which will soon be publishing the 21st edition.
In addition to startups adopting RISC-V, Huawei’s HiSilicon business last month released its first RISC-V board, the HiSilicon Hi3861, for Harmony OS developers, in a bid to overcome US restrictions. There is also the 2K RISC-V laptop project in China, being developed by the Institute of Software at the Chinese Academy of Sciences (ISCAS). In a post within a RISC-V working group, a developer team said it is working on some porting development as part of a wider project in which ISCAS is seeking to build 2,000 RV64GC laptops before the end of 2022. The developer, Wei Wu, said, “There are still a few ‘big absences’ in the RISC-V software ecosystem which should be supported when the hardware is ready. The availability of mainstream browsers is currently the highest demand we heard.”
Taking out the China and Arm/Nvidia factors, more designers are moving to RISC-V as they pursue different business models. Art Swift, president and CEO of AI chipmaker Esperanto Technologies, said earlier this year, “Instead of a handful of MCUs, all based on the same core, RISC-V provides an opportunity to license a greater variety of cores from multiple vendors.”
While there are several large well-known firms who have adopted RISC-V, including Imagination Technologies, Microchip and NXP Semiconductors, another advocate of the ISA’s utility is Andes Technology, who last week announced a solution to enable chip designers to explore RISC-V processors remotely in an online collection of FPGA boards. Its AndesBoardFarm service reduces the time and effort for evaluating RISC-V processors, by allowing customers to upload their program on an available board; these FPGA boards accommodate all Andes RISC-V offerings embedded in reference SoC designs, including 32-bit and 64-bit processors with a single core or multi-core.
Meanwhile Imagination Technologies even started a RISC-V computer architecture course for undergraduate teaching as part of its Imagination University Programme (IUP). The company’s director of this program, Robert Owen, said at the launch last year, “RISC-V is real and will pervade every computing level in the next five years. Its openness has enabled designers at all levels to get involved with processors without having to worry about licensing at the early stages of design. This is empowering a new generation to experiment. Up to now, academic activity has been focused on SoC design. This course is the first to provide the all-important foundation of understanding of the components of the RISC-V “engine” and how they come together.”
Source: EETIMES.com
